A solution for constraints development and verification, allowing
system-on-chip (SoC) and integrated circuit (IC) developers to
make massive productivity gains across the design flow.
Modern SoC’s have several operational modes and the task of verifying STA coverage across all modes becomes very challenging. Often times, some portions of the design are intentionally inactive and uncovered by STA for a particular mode. Designers waive these uncovered portions assuming that they are covered in some other mode. This is a dangerous assumption. Using Timevision Multi-Mode Coverage design teams can identify logic that is uncovered by STA across all design modes considered together, ensuring complete coverage.NEXT MODULE >