Ausdia at DAC 2017
Ausdia will be highlighting two significant new features in TimeVision, the leading platform for Constraints Design, Verification and Management Solution at DAC 2017. TimeVision has been designed for modern, complex SoCs with 100Ms of cells, and 1000s of clocks, lots of IP and will works at RTL/System level all the way to gate-level implementation.

See how Ausdia can

° Put you into the drivers seat for hierarchical SoC integration & management with SDC consistency,
   promotion and demotion across the hierarchy, with budget creation, verification and refinement in
   the loop.

° Give you rock-solid confidence in your timing exceptions at signoff with a combination of Formal and
   Simulation techniques to ensure correctness before tapeout.

Sign-up for one of our multiple demos where Ausdia will be showcasing TimeVision, TimeVision-Formal. You will be contacted by one of our team members to confirm your meeting.
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